Title :
0.18μm CMOS limiting amplifier for 10Gb/s optical receiver
Author :
Fuhai Shang ; Peng Miao ; Ling Tian ; Yingmei Chen ; Yong Tak Lee ; BongKyu Jeong
Author_Institution :
Inst. of RF- & OE-ICs, Southeast Univ., Nanjing, China
Abstract :
We realized 10Gb/s limiting amplifier by using SMIC 0.18μm 1P6M mixed-signal CMOS process. Without any inductors, the bandwidth of the amplifier is effectively increased while maintaining a flat frequency response by using a third-order interleaving active feedback. The post-simulation results indicates that it can work at the bit-rate of 10Gb/s, a small-signal gain is 45.6 dB, a -3-dB bandwidth is 8.9 GHz, and an input sensitivity is 5mV at 10Gb/s data-rate. It can achieve an output swing of 400mV with 50Ω external load resistors. The circuit consumes a DC power of 163mW from a 1.8V supply voltage. The active area is μm ×600μm.
Keywords :
CMOS analogue integrated circuits; MMIC amplifiers; field effect MMIC; frequency response; optical receivers; CMOS limiting amplifier; SMIC 1P6M mixed-signal CMOS process; bit rate 10 Gbit/s; external load resistors; flat frequency response; frequency 8.9 GHz; gain 45.6 dB; inductors; limiting amplifier; optical receiver; power 163 mW; resistance 50 ohm; size 0.18 mum; third-order interleaving active feedback; voltage 1.8 V; voltage 400 mV; voltage 5 mV; Bandwidth; CMOS integrated circuits; CMOS process; Limiting; Optical fiber amplifiers; Optical receivers; 0.18μm CMOS; interleaving feedback; limiting amplifier; three stage active feedback;
Conference_Titel :
Microwave Workshop Series on Millimeter Wave Wireless Technology and Applications (IMWS), 2012 IEEE MTT-S International
Conference_Location :
Nanjing
Print_ISBN :
978-1-4673-0901-1
Electronic_ISBN :
978-1-4673-0903-5
DOI :
10.1109/IMWS2.2012.6338215
