DocumentCode
1934605
Title
RISC Processing In Fastbus
Author
Atiya, M. ; Haggerty, J. ; Ng, C. ; Sambamurti, A. ; Strzelinski, R.
Author_Institution
Brookhaven National Laboratory
fYear
1990
fDate
22-27 Oct 1990
Firstpage
280
Lastpage
281
Keywords
Coprocessors; Data acquisition; Data analysis; Fastbus; Hardware; Logic; Random access memory; Read-write memory; Reduced instruction set computing; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Nuclear Science Symposium, 1990. Conference record : Including Sessions on Nuclear Power Systems and Medical Imaging Conference, 1990 IEEE
Print_ISBN
0-87942-683-7
Type
conf
DOI
10.1109/NSSMIC.1990.693340
Filename
693340
Link To Document