Development of V-band low noise amplifiers in 90nm CMOS

This paper presents the design and measurement of V-band low noise amplifiers. The amplifiers employ common-source structure and hybrid matching topology for reducing the signal loss and improve return loss. To verify the design, an one-stage low noise amplifier (LNA) and a three-stage LNA are fabricated by using 90nm IBM CMOS process. The measured gain of one-stage LNA is about 5dB from 47 to 60GHz, and the gain is positive in entire V-band. The three-stage LNA achieves more than 15dB gain from 48 to 60GHz, and more than 10dB gain in entire V-band. The measured results of the two LNAs matched well. The power dissipation of one-stage and three-stage LNA are 9.6mW and 30mW. The chip size for one-stage LNA and three-stage LNA are 0.44mm² and 0.86mm².