Development of a general purpose low-power small-area 10 bit current steering CMOS DAC

The design and measurements of the prototype general purpose digital to analog converter for readout systems in high energy physics experiments are presented. The main goals for the proposed DAC are low power consumptions, small die area and high output swing. The 10 bit DAC design is based on current steering architecture comprising high swing class AB output amplifier. The prototype ASIC is fabricated in the 2P-4M 0.35-mum technology. The measurements of maximum differential (DNL) and integral (INL) nonlinearity show 0.8 and 0.6 LSB respectively. The total power consumption is below 0.6 mW while the area is 0.18 mm².