DocumentCode
1935493
Title
Design of an array processing unit for an array processor
Author
Moreira, E.D.S. ; Zobel, R.N.
Author_Institution
Dept. de Ciencia da Computacao e Estatistica, Sao Carlos, Brazil
fYear
1988
fDate
7-9 June 1988
Firstpage
797
Abstract
An effort was made to design a small and cheap array processing unit (APU) to be used in a major distributed process array processor system for digital signal-processing applications. From the task definition and environment analysis, a design is presented. The unit, based on the Texas TMS 32020 and Intel 80186 is of the load-and-forget type and provides efficient memory management and operand accessing techniques to speed up the processing. An example is provided to illustrate details of the implementation and performance. It is concluded that the design presented fulfils requirements outlined for the APU.<>
Keywords
computerised signal processing; microcomputer applications; multiprocessing systems; signal processing equipment; Intel 80186; Texas TMS 32020; array processing unit; array processor system; digital signal-processing applications; distributed process; environment analysis; load-and-forget type; load/forget type; memory management; multiprocessor; operand accessing techniques; task definition; Algorithm design and analysis; Application software; Arithmetic; Array signal processing; Computer science; Costs; Digital signal processing; Memory management; Signal design; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo, Finland
Type
conf
DOI
10.1109/ISCAS.1988.15045
Filename
15045
Link To Document