Title :
An Advanced Fabrication Process for 3D-CMOS Devices
Author :
Büchner, R. ; Haberger, K. ; Seitz, S. ; Weber, J. ; van der Wel, W. ; Seegebrecht, P.
Author_Institution :
Fraunhofer-Institut f?r Festk?rpertechnologie, Paul-Gerhardt-Allee 42, D-8000 M?nchen 60, FRG
Abstract :
An advanced 2 ¿m 3D-CMOS process was developed which allows the fabrication of NMOS devices in the substrate and CMOS devices in a thin laser recrystallized polysilicon layer. The processing parameters were determined carefully in order to obtain a high-quality SOI layer and to avoid any degradation of underlying substrate devices. The fabricated devices in both layers show customary bulk device quality.
Keywords :
CMOS process; CMOS technology; Degradation; Insulation; Integrated circuit technology; MOS devices; Optical device fabrication; Silicon on insulator technology; Substrates; Temperature;
Conference_Titel :
Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
Conference_Location :
Berlin, Germany
