Predicting and controlling FPGA Device Heat using System monitor and IBERT (internal bit error ratio tester)

The aim of this paper is to present a new methodology and the tools used to predict and control the FPGA Device Heat before starting the design. Knowing that the FPGA silicon heat is crucial as they all have a temperature above and under which their functionalities is not longer guaranteed. The silicon temperature is linked to the different options and strategies used to implement the design. Many tools such ldquouse Xpowerrdquo from Xilinx allows the user to have an estimation of the power consumption. This paper will present a primitive called System monitor which is present in every Virtex 5 to monitor the environment around the FPGA. Monitoring the device environment maximises the probability of getting the FPGA work after implementing required design.