Title :
Increasing roughness at SiO2/Si interface during thermal oxidation
Author :
Hojo, D. ; Tokuda, N. ; Yamabe, K.
Author_Institution :
Inst. of Appl. Phys., Univ. of Tsukuba, Ibaraki, Japan
Abstract :
To realize highly reliable thin oxide with low leakage current, Si surface topography should be atomically controlled. The authors reported previously that SiO/sub 2//Si interface topography with wide step/terrace structures was roughened during thermal oxidation for comparatively thick SiO/sub 2/ film at higher temperatures. On the other hand, Watanabe et al. (1998, 2000) and Miyata et al. (1998) reported a layer-by-layer oxidation at the SiO/sub 2//Si interface using scanning reflection electron microscopy (SREM) for relatively thin SiO/sub 2/ film. The layer-by-layer oxidation means that the interface topography is preserved during oxidation. It apparently seems that those two phenomena are inconsistent with each other. In this study, roughness at the SiO/sub 2//Si interface was atomically investigated using AFM in an intermediated SiO/sub 2/ thickness.
Keywords :
atomic force microscopy; elemental semiconductors; interface roughness; oxidation; semiconductor-insulator boundaries; silicon; silicon compounds; AFM; Si surface topography; SiO/sub 2/-Si; SiO/sub 2//Si interface; interface topography; layer-by-layer oxidation; low leakage current; roughness; scanning reflection electron microscopy; thermal oxidation; wide step/terrace structures; Electrons; Leakage current; Optical films; Oxidation; Reflection; Rough surfaces; Semiconductor films; Surface roughness; Surface topography; Temperature;
Conference_Titel :
Gate Insulator, 2001. IWGI 2001. Extended Abstracts of International Workshop on
Conference_Location :
Tokyo, Japan
Print_ISBN :
4-89114-021-6
DOI :
10.1109/IWGI.2001.967562