Latch-up Free CMOS Using Buried Polysilicon Diodes

Latch-up free CMOS circuit operation is achieved through the use of buried polysilicon diodes instead of conventional (ohmic) well contacts. In a DRAM technolgy with polysilicon bit line a buried polysilicon diode can be realized with no additional process step and no additional die area is required. No degradition of MOS device parameters occurs. The basis for experiment is a 4M DRAM 0.9¿m n-well CMOS technology with substrate bias generator [1].