DocumentCode :
1936586
Title :
A scalar supercomputer
Author :
Gerskovich, P. ; Wilson, P.
Author_Institution :
Prisma Inc., Colorado Springs, CO, USA
fYear :
1989
fDate :
Feb. 27 1989-March 3 1989
Firstpage :
454
Lastpage :
455
Abstract :
A description is given of the scalar supercomputer and of a particular implementation, the Prisma machine. The performance goal is a sustained rate of 150 million instructions per second, with matched memory size and I/O capabilities. The machine will be binary-compatible with other computers implementing the SPARC architecture. To obtain this level of performance, designers are implementing the computer with gallium arsenide integrated circuits. The circuit have a typical delay of about 150 ps, allowing the use of a system clock of around 4 ns. Using a proprietary packaging technology, the entire CPU may be packaged in a few cubic feet, minimizing interconnection delay. The machine will also support IEEE floating-point arithmetic, providing a more secure numerical foundation for complex computations than machines which are unable to support the standard.<>
Keywords :
parallel processing; 150 MIPS; I/O capabilities; IEEE floating-point arithmetic; Prisma machine; SPARC architecture; binary-compatible; matched memory size; packaging technology; scalar supercomputer; Central Processing Unit; Clocks; Computer architecture; Delay; Gallium arsenide; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuit technology; Packaging machines; Supercomputers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
COMPCON Spring '89. Thirty-Fourth IEEE Computer Society International Conference: Intellectual Leverage, Digest of Papers.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-1909-0
Type :
conf
DOI :
10.1109/CMPCON.1989.301974
Filename :
301974
Link To Document :
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