• DocumentCode
    1936622
  • Title

    Re-implementation synthesis

  • Author

    Cooke, L.H.

  • Author_Institution
    Integrated CMOS Syst., Sunnyvale, CA, USA
  • fYear
    1989
  • fDate
    Feb. 27 1989-March 3 1989
  • Firstpage
    462
  • Lastpage
    468
  • Abstract
    Reimplementation synthesis (also referred to as Remap) is a set of tools and techniques that allows a largely synchronous design that is presently implemented on multiple cards with multiple previous-generation ASICs (application-specific integrated circuits) to be converted into a single card with current generation ASICs, without knowing the detailed structure of the machine´s architecture. A description is given of one such project and the tools and techniques used.<>
  • Keywords
    logic CAD; ASICs; Remap; multiple cards; reimplementation synthesis; set of tools; synchronous design; Application specific integrated circuits; CMOS logic circuits; CMOS technology; Clocks; High performance computing; Logic design; Logic testing; PROM; Synchronous generators; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    COMPCON Spring '89. Thirty-Fourth IEEE Computer Society International Conference: Intellectual Leverage, Digest of Papers.
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-8186-1909-0
  • Type

    conf

  • DOI
    10.1109/CMPCON.1989.301976
  • Filename
    301976
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1936622