Title :
Analysis of power/ground planes by PCB simulator with model order reduction technique
Author :
KUBOTA, Hidemasa ; Kamo, Atsushi ; Watanabe, Takayuki ; Asai, Hideki
Author_Institution :
Fac. of Eng., Shizuoka Univ., Hamamatsu, Japan
Abstract :
With the progress of integration of circuits and PCBs (printed circuit boards), novel techniques have been required for verification of signal integrity. Noise analysis of the power/ground planes is one of the most important issues. This paper describes a high-speed simulator for PCBs which contain interconnects with nonlinear terminations. This simulator is based on the ASSIST environmental tool constructed for development of the circuit simulators, and is combined with PRIMA (passive reduced-order interconnect macromodeling algorithm). In this simulator, an efficient implementation of PRIMA is considered with use of a voltage-controlled current source (VCCS) model. Finally, this simulator is applied to the analysis of power/ground planes of simple PCBs, and the validity is verified
Keywords :
active networks; circuit simulation; interconnections; packaging; power supply circuits; printed circuits; software tools; ASSIST environmental tool; PCB high-speed simulator; PCB simulator; PCBs; PRIMA; VCCS model; circuit integration; circuit simulators; interconnects; model order reduction technique; noise analysis; nonlinear terminations; passive reduced-order interconnect macromodeling algorithm; power/ground plane analysis; power/ground planes; printed circuit boards; signal integrity verification techniques; voltage-controlled current source model; Analytical models; Circuit noise; Circuit simulation; Integrated circuit interconnections; LAN interconnection; Power engineering and energy; Power system modeling; Printed circuits; RLC circuits; Voltage;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2001
Conference_Location :
Cambridge, MA
Print_ISBN :
0-7803-7024-4
DOI :
10.1109/EPEP.2001.967615
