DocumentCode :
1937353
Title :
Design for packageability-the impact of bonding technology on the size and layout of VLSI dies
Author :
Dehkordi, Peyman H. ; Bouldin, Donald W.
Author_Institution :
Dept. of Electr. & Comput. Eng., Tennessee Univ., Knoxville, TN, USA
fYear :
1993
fDate :
15-18 Mar 1993
Firstpage :
153
Lastpage :
159
Abstract :
The impact of bonding technology from an IC designer´s point of view is studied. Work by others has concentrated just on the effect of packaging alone, whereas this study investigates the effect of changing the VLSI dies. Specifically, the impact of wire-bond and flip-chip technologies on the size and layout of VLSI dies is demonstrated by means of general discussion and detailed examples. Three VLSI chips of various sizes and I/O requirements have been synthesized based on a standard-cell library for both wire-bond and flip-chip. The results show different die layouts and sizes can be achieved based on the choice of wire-bond or flip-chip technologies
Keywords :
VLSI; circuit layout CAD; flip-chip devices; integrated circuit technology; lead bonding; multichip modules; CAD; I/O requirements; IC design; MCM technology; VLSI chips; VLSI dies layout; bonding technology; design for packageability; die size; flip-chip technologies; packaging effect; standard-cell library; wire band technology; Bonding; Circuits; Costs; Energy consumption; Manufacturing; Packaging; Performance gain; Silicon; System performance; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multi-Chip Module Conference, 1993. MCMC-93, Proceedings., 1993 IEEE
Conference_Location :
Santa Cruz, CA
Print_ISBN :
0-8186-3540-1
Type :
conf
DOI :
10.1109/MCMC.1993.302135
Filename :
302135
Link To Document :
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