DocumentCode
1937795
Title
Using stochastic chaotic simulated annealing in the FPGA segmented channel routing problem
Author
Wang, Lipo ; Zhang, Wensong
fYear
2005
fDate
28-30 May 2005
Firstpage
288
Lastpage
291
Abstract
Field programmable gate array (FPGA) segmented channel routing is a difficult combinatorial optimization problem. Neural networks have been successfully used to solve this problem. The Hopfield neural network (HNN) is easily stuck in local minimum but not global minimum, resulting in difficulties in finding the optional solution. This paper applies stochastic chaotic simulated annealing (SCSA) to the FPGA segmented channel routing problem (FSCRP) and compares the solutions of SCSA and the HNN.
Keywords
Hopfield neural nets; chaos; field programmable gate arrays; network routing; simulated annealing; stochastic processes; FPGA; Hopfield neural network; combinatorial optimization problem; field programmable gate array; segmented channel routing problem; stochastic chaotic simulated annealing; Chaos; Circuits; Costs; Equations; Field programmable gate arrays; Fuses; Power capacitors; Routing; Simulated annealing; Stochastic processes;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design and Video Technology, 2005. Proceedings of 2005 IEEE International Workshop on
Print_ISBN
0-7803-9005-9
Type
conf
DOI
10.1109/IWVDVT.2005.1504607
Filename
1504607
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