Generating concurrent test-programs with collisions for multi-processor verification

Author

Adir, Alon ; Shurek, Gil

Author_Institution

IBM Res. Lab., Haifa, Israel

fYear

2002

fDate

27-29 Oct. 2002

Firstpage

77

Lastpage

82

Abstract

We discuss collisions that are of interest to multiprocessor verification. Collisions occur when different processes access a shared resource. We investigate how the results of such collisions can be presented in test programs and suggest implementations for automatically generating such tests and predicting the results of collision scenarios. Most of the ideas presented are the result of years of experience with two multi-processor test generators from IBM (Genie and Genesys-Pro) which are also briefly presented.

Keywords

automatic programming; computer testing; formal verification; high level synthesis; microprocessor chips; multiprocessing systems; performance evaluation; Genesys-Pro; Genie; IBM; collision scenarios; concurrent test-program generation; multi-processor test generators; multiprocessor verification; processors; shared resource access; Automatic testing; Gas insulated transmission lines; Laboratories; Out of order; Performance evaluation; Predictive models; Programming profession; Registers; Switches; Yarn;

fLanguage

English

Publisher

ieee

Conference_Titel

High-Level Design Validation and Test Workshop, 2002. Seventh IEEE International

Print_ISBN

0-7803-7655-2

Type

conf

DOI

10.1109/HLDVT.2002.1224432

Filename

1224432