• DocumentCode
    1938488
  • Title

    Design and performance evaluation of PentiumR III microprocessor packaging

  • Author

    Sarangi, Ananda ; Ji, Gang ; Arabi, Tawfik ; Taylor, Gregory F.

  • Author_Institution
    Intel Corp., Hillsboro, OR, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    291
  • Lastpage
    294
  • Abstract
    This paper describes a design methodology to determine the number of chip capacitors needed and its placement scheme for the latest PentiumR III microprocessor package substrate for optimum performance. The effect of capacitors on the power supply and its performance and placement schemes are discussed and compared against measurements. Performance improvements are outlined and compared between the current 0.13 μm and the previous 0.18 μm silicon package technology designed for compatibility with existing systems
  • Keywords
    capacitors; integrated circuit design; integrated circuit interconnections; integrated circuit measurement; integrated circuit modelling; integrated circuit packaging; microprocessor chips; power supply circuits; 0.13 micron; 0.18 micron; Pentium III microprocessor package substrate; Pentium III microprocessor packaging; Si; capacitor effects; chip capacitors; design evaluation; design methodology; measurements; optimum performance; performance evaluation; placement scheme; power supply; silicon package technology; Capacitors; Frequency; Inductance; Microprocessors; Packaging; Power measurement; Power supplies; Power system modeling; Semiconductor device measurement; Variable structure systems;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Performance of Electronic Packaging, 2001
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-7803-7024-4
  • Type

    conf

  • DOI
    10.1109/EPEP.2001.967666
  • Filename
    967666
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1938488