DocumentCode :
1938600
Title :
Multiple-valued logic operations with universal literals
Author :
Dueck, Gerhard W. ; Butler, Jon T.
Author_Institution :
Dept. of Math. & Comput. Sci., St. Francis Xavier Univ., Antigonish, NS, Canada
fYear :
1994
fDate :
25-27 May 1994
Firstpage :
73
Lastpage :
79
Abstract :
We propose the use of universal literals as a means of reducing the cost of multiple-valued circuits. A universal literal is any function on one variable. The target architecture is a sum-of-products structure, where sum is the truncated sum and product terms consist of the minimum of universal literals. A significant cost reduction is demonstrated over the conventional window literal. The proposed synthesis method starts with a sum-of-products expression. Simplification occurs as pairs of product terms are merged and reshaped. We show under what conditions such operations can be applied
Keywords :
many-valued logics; cost reduction; multiple-valued circuits; multiple-valued logic operations; truncated sum; universal literals; Circuit synthesis; Costs; Councils; Input variables; Laboratories; Logic functions; Minimization methods; Multivalued logic; Programmable logic arrays; Simulated annealing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multiple-Valued Logic, 1994. Proceedings., Twenty-Fourth International Symposium on
Conference_Location :
Boston, MA
Print_ISBN :
0-8186-5650-6
Type :
conf
DOI :
10.1109/ISMVL.1994.302217
Filename :
302217
Link To Document :
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