DocumentCode :
1939093
Title :
A new, cost-effective coreless substrate technology
Author :
Appelt, Bernd K. ; Su, Bruce ; Huang, Alex S F ; Lai, Yi-Shao
Author_Institution :
ASE Group Inc., Santa Clara, CA, USA
fYear :
2010
fDate :
24-26 Aug. 2010
Firstpage :
1
Lastpage :
4
Abstract :
Coreless organic substrates have been desired for many years in order to provide the ultimate wiring capacity that can be achieved just like in ceramic substrates. To date, there have been few successful implementations mostly only for small body size substrates because of the choice of dielectric materials. Here, a technology has been developed based on prepreg dielectrics and on pattern plating to build sequentially the layers of a coreless substrate. A temporary carrier is employed to facilitate handling during the manufacturing process.
Keywords :
dielectric materials; electronics packaging; substrates; wiring; ceramic substrates; coreless organic substrates; cost-effective coreless substrate technology; dielectric materials; manufacturing process; pattern plating; small body size substrates; wiring capacity; Ceramics; Copper; Dielectrics; Etching; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CPMT Symposium Japan, 2010 IEEE
Conference_Location :
Tokyo
Print_ISBN :
978-1-4244-7593-3
Type :
conf
DOI :
10.1109/CPMTSYMPJ.2010.5680297
Filename :
5680297
Link To Document :
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