• DocumentCode
    1939842
  • Title

    Bipartitioning circuits using TABU search

  • Author

    Lodha, Sandeep K. ; Bhatia, Dinesh

  • Author_Institution
    Design Autom. Lab., Cincinnati Univ., OH, USA
  • fYear
    1998
  • fDate
    13-16 Sep 1998
  • Firstpage
    223
  • Lastpage
    227
  • Abstract
    VLSI circuit partitioning is an extensively studied problem. Various iterative improvement based heuristics have been, proposed for obtaining reasonably good solutions. In this paper we explore the applicability of TABU search for partitioning of electrical circuits. We briefly describe the TABU search and its application to circuit or graph partitioning. We have generated experimental results on a variety of standard benchmark circuits. Our results match in quality, and at times improve, the tightest known results in the partitioning literature. We have shown extensive comparison with at least six very well known methods for circuit partitioning
  • Keywords
    VLSI; circuit layout CAD; integrated circuit layout; search problems; IC layout; TABU search; VLSI circuit partitioning; circuit bipartitioning; Aging; Circuit simulation; Cost function; Design automation; Iterative algorithms; Laboratories; Partitioning algorithms; Simulated annealing; Upper bound; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
  • Conference_Location
    Rochester, NY
  • ISSN
    1063-0988
  • Print_ISBN
    0-7803-4980-6
  • Type

    conf

  • DOI
    10.1109/ASIC.1998.722909
  • Filename
    722909