The Voltage Dependence of Degradation in n-MOS Transistors

Hot carrier stressing has been carried out on silicon n-MOS devices as a function of gate voltage, at fixed drain voltages. It is found that a maximum of degradation occurs not only at Vq=Vd/2, but also at Vq=Vd. It is further found that the time power law for threshold voltage shift changes according to the voltage ratio. It is suggested that while the first peak is due to interface state degradation, the second is due to another process, possibly electron trapping in the oxide.