Title :
Proceedings of 7th International Symposium on High-Level Synthesis
Abstract :
The following topics were dealt with: high level synthesis; estimation and scheduling; computer optimisation; retargetable code generation; verification, test, and fault-tolerant systems; control datapath, and interface synthesis
Keywords :
circuit layout CAD; fault tolerant computing; formal verification; logic CAD; computer optimisation; control datapath; fault-tolerant systems; high level synthesis; interface synthesis; retargetable code generation; verification;
Conference_Titel :
High-Level Synthesis, 1994., Proceedings of the Seventh International Symposium on
Conference_Location :
Niagara-on-the-Lake, Ontario, Canada
Print_ISBN :
0-8186-5785-5
DOI :
10.1109/ISHLS.1994.302351
