Simple gate charge (Qg) measurement technique for on-wafer statistical monitoring and modeling of power semiconductor devices

Conventional measurement techniques for gate charge (Qg) require large array test-structures and additional circuitry. These techniques do not use standard ET test equipment, require careful calibration, and are expensive in terms of silicon area. Hence they are not amenable to on-wafer measurement. In this paper, we present a simple yet accurate CV method for on-wafer measurement and monitoring of gate charge. Based on the principle that Q = ∫Idt = ∫CdV, this technique uses small PCM test-structures and basic ET equipment (LCR meter), yet is accurate to within 2%, and thus enables statistical on-wafer process monitoring of Qg.