A converged hardware solution for FFT, DCT and Walsh transform

Author

Tell, Eric ; Seger, Olle ; Liu, Dake

Author_Institution

Dept. of Electr. Eng., Linkoping Univ., Sweden

Volume

1

fYear

2003

fDate

1-4 July 2003

Firstpage

609

Abstract

In this paper, we are interested in developing a programmable baseband processor for multiple radio standards, including the wireless LAN standards 802.11a and 802.11b. 802.11a is based on OFDM and uses a 64-point FFT. Demodulation of the complementary code keying (CCK) used in 802.11b includes the computation of a modified Walsh transform. Similarities have been found between the radix-4 FFT and the fast Walsh transform (FWT) and this has enabled the design of a converged FFT and FWT processor. With small modifications this processor can also be used for calculating the discrete cosine transform (DCT). A converged FFT/FWT/DCT processor was designed and synthesized in a 0.13μm process. Results indicate that the hardware can run at 385 MHz, which means a 64-point FFT/DCT is calculated in 140 ns and a FWT for 802.11b 11Mb/s CCK in 47 ns. The area including memory is 0.40 mm².

Keywords

IEEE standards; OFDM modulation; Walsh functions; discrete cosine transforms; fast Fourier transforms; hardware description languages; 0.13 micron; 140 ns; 47 ns; 64-point FFT; CCK; DCT; FWT processor; OFDM; complementary code keying; discrete cosine transform; fast Walsh transform; modified Walsh transform; multiple radio standards; programmable baseband processor; radix-4 FFT; wireless LAN standards; Baseband; Demodulation; Digital video broadcasting; Discrete Fourier transforms; Discrete cosine transforms; Discrete transforms; Hardware; Local area networks; OFDM; Standards development;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing and Its Applications, 2003. Proceedings. Seventh International Symposium on

Print_ISBN

0-7803-7946-2

Type

conf

DOI

10.1109/ISSPA.2003.1224777

Filename

1224777