Combined C-V/I-V front-end-of-line measurement

We present a simple test structure to measure C-V and I-V curves of the same nominal size FET. The structure is simple enough to be used for technology development, requires only first metal for routing, and allows parallel test. It is an extension of FEOL QVCM technique, reported at this conference in 2011, and uses dc current measurement for C-V extraction with atto-Farad resolution. The utility of the presented technique is illustrated with 22 nm SOI device characterization.