Decoding of a quasi-cyclic LDPC code on a stream processor

The TDMP layered belief-propagation algorithm is investigated for decoding a quasi-cyclic low-density parity-check code on a stream processor using fixed-point arithmetic. The effect of the processor´s fixed-point resolution on the decoder performance is determined, and a simple technique is described for minimizing the performance penalty incurred when using the (highest throughput) lowest-resolution arithmetic mode of the processor. A reordering of the decoder schedule and a modification of the parity checks are also considered which permit increased software pipelining and improved latency hiding, with a corresponding increase in the data throughput. The fixed-point Storm-1 stream processor is used for comparative throughput results.