DocumentCode
1943654
Title
DSP performance evaluation for motion estimation
Author
Louro, Luís ; Santos, Paulo ; Rodrigues, Nuno ; Silva, Vitor ; Faria, Sérgio
Author_Institution
Escola Superior de Tecnologia e Gestao, Inst. Politecnico de Leiria, Portugal
Volume
2
fYear
2003
fDate
1-4 July 2003
Firstpage
137
Abstract
In this paper, we analyze the performance of the floating point digital signal processor (DSP) TMS320C6711 for an implementation of video coding motion. Two relevant motion estimation techniques were implemented: BMA (block matching algorithm) and BMGT (block matching using geometric transforms). These have been combined with fast block matching algorithms to speed up the process. In order to increase the DSP performance, we have optimized some programming mechanisms like: the level of code parallelism, hand designed assembly code and an efficient usage of internal memory as cache. This implementation has shown that real-time motion estimation of BMA type, can be implemented in this DSP. However. BMGT type motion estimation cannot be done by one DSP alone in-real time applications, due to its high computational complexity.
Keywords
cache storage; computational complexity; digital signal processing chips; motion estimation; optimisation; video coding; DSP performance evaluation; assembly code; block matching algorithm; cache internal memory; code parallelism; computational complexity; digital signal processor; geometric transforms; motion estimation techniques; programming mechanisms; video coding motion; Design optimization; Digital signal processing; Digital signal processors; Motion analysis; Motion estimation; Parallel programming; Performance analysis; Signal analysis; Signal processing algorithms; Video coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing and Its Applications, 2003. Proceedings. Seventh International Symposium on
Print_ISBN
0-7803-7946-2
Type
conf
DOI
10.1109/ISSPA.2003.1224834
Filename
1224834
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