Interface States Parameters Deduced from DLTS, ICTS and Conductance Methods on TiAu/Si3N4/ GaInAs MIS Structures

A set of electrical characterization methods has been developed using DLTS, ICTS and Conductance techniques. Taking into account corrections due to the variation of capture cross section versus energy, this method allows for a coherent determination of interface applied to perform an efficient passivation process of the Si3N4/GaInAs interface consisting in an in situ native oxide removal and Si3N4 deposition by multipolar plasmas in a ultra high vacuum system. GaInAs MISFETs with good performances could be achieved using such an optimized process.