DocumentCode :
1944417
Title :
Design and ASIC performance analysis of a reconfigurable digital filter for a UMTS application
Author :
Veljanovski, R. ; Singh, Jaskirat ; Faulkner, M. ; Owall, V.
Author_Institution :
Centre for Telecommun. & Microelectron., Victoria Univ., Melbourne, Vic., Australia
Volume :
2
fYear :
2003
fDate :
1-4 July 2003
Firstpage :
255
Abstract :
A reconfigurable digital root raised cosine (RRC) filter for a UMTS terrestrial radio access (UTRA) mobile terminal receiver is described and analysed. The filter monitors in-band and out-of-band received signal powers and calculates the appropriate filter length that meets the bit-energy to interference ratio (Eb/No). This design is advantageous, as only minimum battery power is used resulting in power consumption savings compared to fixed filter length digital filters. A 70% average power reduction is available for the UTRA - time division duplex (TDD) system.
Keywords :
3G mobile communication; digital filters; radio receivers; radiofrequency interference; ASIC performance analysis; UMTS terrestrial radio access; bit-energy; digital root raised cosine; fixed filter length digital filters; inband signal powers; interference ratio; minimum battery power; mobile terminal receiver; out-of-band received signal powers; power consumption savings; reconfigurable digital filter; time division duplex; 3G mobile communication; Application specific integrated circuits; Band pass filters; Batteries; Digital filters; Finite impulse response filter; Frequency response; Interference; Low pass filters; Performance analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing and Its Applications, 2003. Proceedings. Seventh International Symposium on
Print_ISBN :
0-7803-7946-2
Type :
conf
DOI :
10.1109/ISSPA.2003.1224862
Filename :
1224862
Link To Document :
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