Offset Diffused Drain Transistors for Half-Micron CMOS

Half-micron n- and p-channel transistors with an offset diffused drain structure have been fabricated. A high temperature process and offset implantation of the source-drain dopants was used to obtain graded doping profiles and an optimum effective channel length. Experimental results showed good device quality. The extrapolated lifetime for the n-channel device was 5 years at a power supply voltage of 4.5 V. Hot carrier degradation in p-channel devices cannot be neglected anymore.