DocumentCode :
1944911
Title :
Scalability Study of Floating Body Memory Cells
Author :
Schenk, Andreas
Author_Institution :
Integrated Syst. Lab., ETH Zurich, Zurich, Switzerland
fYear :
2009
fDate :
9-11 Sept. 2009
Firstpage :
1
Lastpage :
4
Abstract :
This paper presents a TCAD study on the scalability of impact-ionization based floating-body memory cells to fully-depleted short-channel devices. Only the energy-balance transport model allows for transient simulations of realistic voltage wave forms. To attain qualified predictions, impact ionization rates were calibrated by full-band Monte Carlo simulations. Inclusion of band-to-band tunneling is crucial, although junction profiles were optimized for minimal gate-induced drain leakage. The memory effect is explored in detail for partially-depleted FETs, stressing the difference between two operation modi: the steady-state avalanche mode which makes use of the soft breakdown of the body-drain junction, and the bipolar mode where the collector current of the parasitic bipolar decays in time due to the loss of stored holes in the base. It is shown that in fully-depleted ultra-thin body FETs the common kink effect is absent, instead a similar floating body effect is found in the subthreshold range which is however suppressed by unavoidable and predominating band-to-band tunneling. Although a large amount of excess holes can be created during WRITE1 and hold relatively steady in the body, this charge is always lost when switching to READ1. At sub-threshold gate voltages, the READ1 current becomes self-determined by band-to-band tunneling, which also fixes the READ0 current to the same value. Above threshold, stored holes are either swept out to the source or their electrostatic impact is negligible compared to the injected charge from the source. No wave form could be found that results in a READ1/READ0 programming window.
Keywords :
Monte Carlo methods; charge injection; field effect transistors; impact ionisation; integrated memory circuits; leakage currents; technology CAD (electronics); tunnelling; READ1; READ1/READ0 programming window; TCAD; WRITE1; band-to-band tunneling; body-drain junction; collector current; energy-balance transport model; floating body memory cell scalability; full-band Monte Carlo simulations; fully-depleted short-channel device; impact-ionization based floating-body memory cells; injected charge; junction profiles; minimal gate-induced drain leakage; parasitic bipolar decays; partially-depleted FET; realistic voltage wave forms; steady-state avalanche mode; subthreshold gate voltage; transient simulations; Avalanche breakdown; FETs; Impact ionization; Laboratories; Predictive models; Scalability; Shape; Steady-state; Tunneling; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 2009. SISPAD '09. International Conference on
Conference_Location :
San Diego, CA
ISSN :
1946-1569
Print_ISBN :
978-1-4244-3974-8
Electronic_ISBN :
1946-1569
Type :
conf
DOI :
10.1109/SISPAD.2009.5290255
Filename :
5290255
Link To Document :
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