Adaptive and pipelined VLSI designs for tree-based codes

A new class of VLSI architectures for data transformation of tree-based codes is proposed. The focus is on transformation functions used for data compression and decompression. The encoding algorithm is based on a pipeline architecture and can generate the code bits in parallel. The algorithms use the principle of propagation of a token in a reverse binary tree constructed from the original codes. The design approaches are applicable to any binary codes, although static Huffman code is used as an illustration. A new hardware algorithm for generating adaptive Huffman codes is proposed and a VLSI architecture for implementing the algorithm is described. The high speed of the new algorithms ensures that data transformation is done as data are being transferred from/to high-speed I/O communication devices