DocumentCode
1945503
Title
DESA: Distributed Elastic Switch Architecture for efficient networks-on-FPGAS
Author
Roca, Antoni ; Flich, José ; Dimitrakopoulos, Giorgos
Author_Institution
Parallel Archit. Lab. (GAP), Univ. Politec. de Valencia, València, Spain
fYear
2012
fDate
29-31 Aug. 2012
Firstpage
394
Lastpage
399
Abstract
Networks-on-FPGA consist of a network of switches connected with point-to-point links and can cover sufficiently the communication needs of complex systems implemented on FPGA platforms. The efficient implementation of such networks requires the appropriate tuning of their components to the characteristics of the FPGA´s logic and memory resources. In this paper, we present a distributed switch architecture that exploits in the best way the structure of the FPGA and achieves significant area/delay savings when compared to baseline switch architectures; more than 50% increase in operating frequency is achieved for similar area. The proposed switch operates as an elastic pipeline and can be spread throughout the FPGA chip irrespective the topology of the network and without limiting the placement options of the corresponding EDA tools.
Keywords
field programmable gate arrays; switches; DESA; EDA tools; baseline switch architectures; distributed elastic switch architecture; efficient network-on-FPGA platforms; elastic pipeline; memory resources; network topology; point-to-point links; Delay; Field programmable gate arrays; Multiplexing; Organizations; Pipelines; Random access memory; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on
Conference_Location
Oslo
Print_ISBN
978-1-4673-2257-7
Electronic_ISBN
978-1-4673-2255-3
Type
conf
DOI
10.1109/FPL.2012.6339135
Filename
6339135
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