Title :
An Hybrid Architecture for consolidating mixed criticality applications on multicore systems
Author :
Avramenko, Serhiy ; Esposito, Stefano ; Violante, Massimo ; Sozzi, Marco ; Traversone, Massimo ; Binello, Marco ; Terrone, Marco
Author_Institution :
Dipt. di Autom. e Inf., Politec. di Torino, Turin, Italy
Abstract :
The paper proposes a novel hybrid architecture to consolidate avionic applications with different levels of criticality in a multicore processor. The architecture stems from the need of deploying into one computer different applications with conflicting requirements in terms of criticalities that today are mapped into multiple independent computers. The architecture relies on a type-1 hypervisor to separate the applications exposing different criticalities levels, to avoid that low-criticality applications might corrupt high-criticality applications. Moreover, the architecture exploits custom-designed hardware watchdogs to enforce error detection. Fault-injection results are presented to illustrate the robustness of the architecture.
Keywords :
error detection; fault diagnosis; multiprocessing systems; architecture stems; avionic applications; criticalities levels; custom-designed hardware watchdogs; error detection; fault-injection; mixed criticality applications; multicore processor; multiple independent computers; type-1 hypervisor; Decision support systems; Testing; avionic; consolidation; critical application (CA); critical partition (CP); fault-tolerance; hyper-visor (HV); intellectual property (IP); mixed-criticality; multi-core; non-critical application (NCA); non-critical partition (NCP); single event upset (SEU); soft-ware bug (SwB); system watchdog timer (SWDT); system-on-programmable-chip (SoPC); watchdog (WD);
Conference_Titel :
On-Line Testing Symposium (IOLTS), 2015 IEEE 21st International
Conference_Location :
Halkidiki
DOI :
10.1109/IOLTS.2015.7229823