DocumentCode
1946252
Title
Dataflow supercomputing
Author
Flynn, Michael J. ; Pell, Oliver ; Mencer, Oskar
Author_Institution
Maxeler Technol., UK
fYear
2012
fDate
29-31 Aug. 2012
Firstpage
1
Lastpage
3
Abstract
Over the past decades parallel processor speedup has been an elusive quantity for a broad class of applications. Yet with the end of performance scaling for single processors the need for speedup has never been greater. The problem is not technology but programming models. One answer to this speedup problem is to create an idealized data flow machine that exactly corresponds to the application and stream data through the resulting machine. This approach can be emulated with FPGAs, providing more than an order of magnitude speedup even as executed as an emulation of the data flow machine.
Keywords
data flow computing; field programmable gate arrays; parallel machines; FPGA; computer architecture; computer design; data flow machine emulation; data stream; dataflow supercomputing; magnitude speedup; parallel processor speedup problem; performance scaling; programming models; Computational modeling; Field programmable gate arrays; Hardware; Kernel; Multicore processing; Programming; Servers;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on
Conference_Location
Oslo
Print_ISBN
978-1-4673-2257-7
Electronic_ISBN
978-1-4673-2255-3
Type
conf
DOI
10.1109/FPL.2012.6339170
Filename
6339170
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