Hardware implementation of stereo correspondence algorithm for the ExoMars mission

Computer vision algorithms exhibit increased complexity introducing significant implementation problems in conventional computing systems, especially whenever real-time constraints are imposed. This paper describes the ESA compatible VHDL development of a stereo correspondence algorithm for rover navigation in the SPARTAN system. The design is implemented on a Xilinx Virtex-6 FPGA and the evaluation results validate the efficiency of the applied methodology by showing real-time performance with minimal hardware utilization.