Specification and automated simulation-based verification of power requirements for system-on-chips

Today´s advances in silicon integration density allow more and more functionality to fit into a system-on-chip (SoC). However, this has made power consumption the most critical design constraint for system-on-chips (SoCs). Power consumption especially affects portable devices as it influences battery lifetime. Moreover, specification, design and verification of System-on-Chips have become increasingly complex. In this work we present a novel methodology which supports specification and automates verification of power requirements through simulation and power estimation. We demonstrate our approach on an example SoC. Therefore, we specify power requirements for a higher class radio frequency identification (RFID) tag. Then we automatically generate test cases which allow to estimate the RFID tag´s power consumption. To verify the power requirements we apply the test cases to the system model in simulation.