Decimation filter design for RSFQ ΣΔ converter

Author

Slimani, M. ; Guelaz, R. ; Desgreys, P. ; Loumeau, P.

Author_Institution

Inst. TELECOM, TELECOM ParisTech, Paris, France

fYear

2009

fDate

June 28 2009-July 1 2009

Firstpage

1

Lastpage

4

Abstract

In order to develop superconducting over-sampled AD converter, based on a band pass sigma delta modulator, we study a sinc decimation filter using top-down method: Matlab simulations are performed to determine filter specifications, VHDL behavioral model of the complete architecture (sigma delta AD converter, I/Q mixer and low pass decimation filter) is realized to validate decimation filter performance and finally SFQ elementary cells are implemented using VHDL-AMS tool.

Keywords

digital filters; hardware description languages; mathematics computing; sigma-delta modulation; superconducting filters; superconducting mixers; I-Q mixer; Matlab simulations; RSFQ SigmaDelta converter; VHDL behavioral model; VHDL-AMS; low pass decimation filter; oversampling sigma delta A-D converter; superconducting A-D converter; top-down method; Band pass filters; Delta modulation; Delta-sigma modulation; Digital filters; Digital modulation; Filtering; Low pass filters; Sampling methods; Superconducting filters; Telecommunications;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems and TAISA Conference, 2009. NEWCAS-TAISA '09. Joint IEEE North-East Workshop on

Conference_Location

Toulouse

Print_ISBN

978-1-4244-4573-8

Electronic_ISBN

978-1-4244-4574-5

Type

conf

DOI

10.1109/NEWCAS.2009.5290488

Filename

5290488