DocumentCode :
1947297
Title :
Asynchronous design-an interesting alternative
Author :
Emerson, Kimberly D.
Author_Institution :
Mentor Graphics Corp., Singapore
fYear :
1997
fDate :
4-7 Jan 1997
Firstpage :
318
Lastpage :
320
Abstract :
The fundamental assumptions of synchronous design have been under some scrutiny of late. Every synchronous designer must assume: all signals are binary and time is discrete. Many designers are realizing that most of their problems surround these basic assumptions. Problems which seriously impact their final results include clock skew, power consumption, and critical path delays. Asynchronous design offers an interesting alternative by keeping the assumption that signals are binary but removing the assumption that time is discrete. Asynchronous design as an alternative to synchronous design is a theoretical realization that warrants some attention. In the past asynchronous design was thought to be impractical, but now that several methodologies have been published and CAD algorithms developed, many believe there is new hope for asynchronous designs. Most believe that coupling asynchronous design with synchronous design is the most practical. The author highlights some of the methodologies and CAD algorithms published to date
Keywords :
asynchronous circuits; delays; logic CAD; logic design; CAD algorithms; asynchronous design; binary signals; clock skew; critical path delays; discrete time assumption; methodologies; power consumption; Algorithm design and analysis; Asynchronous circuits; Clocks; Delay; Design automation; Energy consumption; Metastasis; Power system protection; Robustness; Signal design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1997. Proceedings., Tenth International Conference on
Conference_Location :
Hyderabad
ISSN :
1063-9667
Print_ISBN :
0-8186-7755-4
Type :
conf
DOI :
10.1109/ICVD.1997.568097
Filename :
568097
Link To Document :
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