A visual approach for asynchronous circuit synthesis

A new approach for the synthesis of asynchronous interface circuits from the Signal Transition Graph (STG) specifications is discussed. As a novel contribution we propose a visual path-oriented algorithm to ascertain whether a given STG has Complete State Coding (CSC) property. Unlike most of the existing algorithms which operate on a state graph, this algorithm operates on the STG. This approach has the advantage of being either easily automated or easier to visually correlate with the STG specifications and to perform by a paper and pencil. Experimental results with a large number of practical asynchronous bench marks are presented