DocumentCode
1947480
Title
New test structures for on-chip absolute and accurate measurement of capacitances in a CMOS process
Author
Khalkhal, A. ; Girard, P. ; Nouet, P.
Author_Institution
Lab. d´´Inf. de Robotique et de Microelectron. de Montpellier, Univ. des Sci. et Tech. du Languedoc, Montpellier, France
fYear
1994
fDate
22-25 Mar 1994
Firstpage
130
Lastpage
134
Abstract
A new on-chip capacitance measurement technique is presented. Since no reference devices are required, it allows the absolute determination of constant capacitances and matching errors are greatly reduced. The test structure can be easily scaled to any CMOS process and can be used with unstable or not totally characterized processes. Experimental results show an accuracy better than 5% and a resolution of about 1% for capacitances varying from 4 up to 135 fF
Keywords
CMOS integrated circuits; capacitance measurement; integrated circuit testing; 4 to 135 fF; CMOS process; absolute determination; matching error reduction; on-chip capacitance measurement; test structures; CMOS process; Capacitance measurement; Circuit simulation; MOS capacitors; Measurement techniques; Robots; Silicon; Testing; Time measurement; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1994. ICMTS 1994. Proceedings of the 1994 International Conference on
Conference_Location
San Diego, CA
Print_ISBN
0-7803-1757-2
Type
conf
DOI
10.1109/ICMTS.1994.303489
Filename
303489
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