DocumentCode :
1947503
Title :
SOI device parameter investigation and extraction for VLSI radiation hardness modeling with SPICE
Author :
Petrosjanc, K.O. ; Adonin, A.S. ; Kharitonov, I.A. ; Sicheva, M.V.
Author_Institution :
Moscow Univ. of Electron. & Math., Russia
fYear :
1994
fDate :
22-25 Mar 1994
Firstpage :
126
Lastpage :
129
Abstract :
The united SOI/SOS MOSFET model adapted to SPICE is proposed for VLSI radiation hardness simulation. The procedure for MOS transistor model parameters definition using the test structures is developed. The examples of parameter extraction for irradiated SOI/SOS devices with different configurations are demonstrated. ICs operated under different doses of irradiation were modeled. The results of modeling are in good agreement with the experimental data
Keywords :
CMOS integrated circuits; SPICE; VLSI; circuit analysis computing; insulated gate field effect transistors; radiation hardening (electronics); semiconductor-insulator boundaries; silicon; SOI device parameter investigation; SPICE; VLSI radiation hardness modeling; irradiation doses; model parameters definition; parameter extraction; radiation hardness simulation; united SOI/SOS MOSFET model; CMOS technology; Circuit testing; Large scale integration; MOSFET circuits; SPICE; Semiconductor device modeling; Silicon; Threshold voltage; Transconductance; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronic Test Structures, 1994. ICMTS 1994. Proceedings of the 1994 International Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-1757-2
Type :
conf
DOI :
10.1109/ICMTS.1994.303490
Filename :
303490
Link To Document :
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