23mm2 single-chip 0.18μm CMOS GPS receiver with 28mW-4.1 mm2 radio and CPU/DSP/RAM/ROM

A 23 mm² 0.18 μm CMOS GPS receiver with ARM7-DSP-64 k RAM-256 k ROM and a 28 mW-4.1 mm² radio has been integrated. The SoC GPS receiver, connected to an active antenna, provides latitude, longitude, height with 3 m rms precision with no need of external host processor in [-20,80]°C temperature range. The radio draws 17.5 mA from a 1.6 V-1.8 V supply, takes 11 pins of a VFQFPN68 package and needs just a few passives for input matching and one crystal. Measured radio performances are: NF=4.8 dB, Gp=92 dB, image rejection >30 dB, -112 dBc/Hz @ 1 MHz offset phase noise. Though linearity and ruggedness of the GPS radio have been made compatible with the co-existence of microprocessor, its silicon area and power consumption is aligned with state-of-the-art stand-alone CMOS GPS radio. The one reported here is the first ever radio successfully embedded into a single-chip GPS receiver requiring no external host to achieve satellite tracking and position fix with a total die area of 23 mm².