DocumentCode :
1947559
Title :
Observation of one-fifth-of-a-clock wake-up time of power-gated circuit
Author :
Miyazaki, Takayuki ; Canh, Tran Quang ; Kawaguchi, Hiroshi ; Sakurai, Takayasu
Author_Institution :
Inst. of Ind. Sci., Univ. of Tokyo, Japan
fYear :
2004
fDate :
3-6 Oct. 2004
Firstpage :
87
Lastpage :
90
Abstract :
The wake-up time of zigzag super cut-off CMOS (ZSCCMOS) is measured using a functional block for the first time. The measurement method is established and the measured wake-up time is 16% of the cycle time for a 16-bit Brent-Kung adder. The wake-up time corresponds to a three 2-input NAND delay. The delay overhead and leakage current reduction of ring oscillators are also measured for the first time. Leakage reduction by a factor of 100 to 1000 is possible for dormant circuit blocks. Thus ZSCCMOS is shown to be effective as a clock-gating substitute.
Keywords :
CMOS logic circuits; NAND circuits; adders; integrated circuit measurement; leakage currents; low-power electronics; 16 bit; Brent-Kung adder; ZSCCMOS wake-up time; clock-gating; delay overhead; dormant circuit blocks; dual-input NAND delay; leakage current reduction; one-fifth-of-a-clock wake-up time; power-gated circuits; ring oscillator measurement; wake-up time measurement; zigzag super cut-off CMOS; Adders; Circuits; Clocks; Current measurement; Delay effects; Leakage current; Ring oscillators; Switches; Time measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004
Print_ISBN :
0-7803-8495-4
Type :
conf
DOI :
10.1109/CICC.2004.1358743
Filename :
1358743
Link To Document :
بازگشت