Title :
Novel test structures for process development and monitoring of stack etches for high density FLASH and EPROM memories
Author :
Shacham, E. ; Wolstenholme, G. ; Perry, J. ; Narahai, N. ; Bergemont, A.
Author_Institution :
Nat. Semicond. Corp., Santa Clara, CA, USA
Abstract :
In this paper a novel and simple but effective stacked gate etch test structure, specific to the requirements of of non-volatile memories, used for the early stages of process development and monitoring of a 0.5 μm high density FLASH process is reported
Keywords :
EPROM; etching; integrated circuit testing; semiconductor process modelling; 0.5 micron; EPROM; FLASH memories; high density memories; high density process; monitoring; nonvolatile memories; process development; stack etches; test structures; Condition monitoring; EPROM; Etching; Manufacturing processes; Nonvolatile memory; Protection; Resists; Robustness; Surfaces; Testing;
Conference_Titel :
Microelectronic Test Structures, 1994. ICMTS 1994. Proceedings of the 1994 International Conference on
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-1757-2
DOI :
10.1109/ICMTS.1994.303496
