DocumentCode
1947713
Title
Built-in self-test for large embedded CMOS folded PLAs
Author
Dandapani, R. ; Gulati, R.K. ; Goel, D.K.
Author_Institution
Dept. of Electr. Eng., Colorado Univ., Colorado Springs, CO, USA
fYear
1988
fDate
7-10 Nov. 1988
Firstpage
236
Lastpage
239
Abstract
A built-in self-test (BIST) design method for large embedded CMOS folded programmable logic arrays (PLAs) is presented that is based on a deterministic, function-independent structural method. It requires about half the testing time and comparable area overhead of deterministic BIST methods applied to corresponding nonfolded PLAs. Tests to detect stuck-at, bridging, cross-point and stuck-open faults are given.<>
Keywords
CMOS integrated circuits; automatic testing; logic arrays; logic design; logic testing; BIST design method; area overhead; bridging faults; built-in self-test; cross-point faults; deterministic BIST methods; function-independent structural method; large embedded CMOS folded PLAs; large embedded CMOS folded programmable logic arrays; stuck-at faults; stuck-open faults; testing time; Built-in self-test; Circuit faults; Circuit testing; Design methodology; Fault detection; Logic design; Logic testing; Programmable logic arrays; Springs; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on
Conference_Location
Santa Clara, CA, USA
Print_ISBN
0-8186-0869-2
Type
conf
DOI
10.1109/ICCAD.1988.122501
Filename
122501
Link To Document