CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits

Author

Saab, D.G. ; Mueller-Thuns, R.B. ; Blaauw, D. ; Abraham, J.A. ; Rahmeh, J.T.

Author_Institution

Coord. Sci. Lab., Illinois Univ., Urbana, IL, USA

fYear

1988

fDate

7-10 Nov. 1988

Firstpage

246

Lastpage

249

Abstract

The design and implementation of a hierarchical switch-level simulator for complex digital circuits is discussed. The hierarchy is exploited to reduce the memory requirements of the simulation, thus allowing the simulation of circuits that are too large to simulate at the flat level. The algorithm used in the simulator operates directly on the hierarchical circuit description. Speedup is obtained through the use of high-level models. The simulator has been implemented on a SUN workstation and used to simulate a switch-level description of the Motorola 68000 microprocessor.<>

Keywords

VLSI; circuit analysis computing; parallel algorithms; CHAMP; Motorola 68000 microprocessor; SUN workstation; VLSI circuit simulation; complex digital circuits; concurrent program; hierarchical circuit description; hierarchical switch-level simulator; high-level models; memory requirements; multilevel program; switch-level description; Circuit faults; Circuit simulation; Computational modeling; Computer simulation; Logic testing; Microprocessors; Sun; Switches; Switching circuits; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on

Conference_Location

Santa Clara, CA, USA

Print_ISBN

0-8186-0869-2

Type

conf

DOI

10.1109/ICCAD.1988.122503

Filename

122503