DocumentCode
1948182
Title
Desien for testability - Session 10
fYear
2004
fDate
3-6 Oct. 2004
Firstpage
195
Lastpage
195
Keywords
Bandwidth; Circuit optimization; Circuit testing; Clocks; Complexity theory; Costs; Design for testability; Semiconductor device manufacture; Semiconductor device testing; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004
Print_ISBN
0-7803-8495-4
Type
conf
DOI
10.1109/CICC.2004.1358774
Filename
1358774
Link To Document