Efficient implementation of the normalized recursive least-square lattice filter

An efficient hardware implementation is proposed for the optimal, computationally intensive, normalized recursive least-squares lattice (NLSL) adaptive filter. NLSL operation steps are optimized for better hardware utilization. To best match the execution steps, a combined processing unit for radix-2 division and square-root operations, and a radix-4 MSB-first multiplication unit based on signed digit (SD) arithmetic are proposed. The proposed NLSL implementation achieves both good area and time performance. The approach is shown to be better than the CORDIC approach, and SD arithmetic is a good choice for implementing the complicated signal processing algorithms