Efficient implementation of the normalized recursive least-square lattice filter

Author

Chen, Sau-Gee ; Lin, Jih-Feng

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

1991

fDate

14-17 Apr 1991

Firstpage

1565

Abstract

An efficient hardware implementation is proposed for the optimal, computationally intensive, normalized recursive least-squares lattice (NLSL) adaptive filter. NLSL operation steps are optimized for better hardware utilization. To best match the execution steps, a combined processing unit for radix-2 division and square-root operations, and a radix-4 MSB-first multiplication unit based on signed digit (SD) arithmetic are proposed. The proposed NLSL implementation achieves both good area and time performance. The approach is shown to be better than the CORDIC approach, and SD arithmetic is a good choice for implementing the complicated signal processing algorithms

Keywords

adaptive filters; digital arithmetic; digital filters; least squares approximations; adaptive filter; combined processing unit; efficient hardware implementation; normalized recursive least-square lattice filter; optimised operation steps; radix-2 division; radix-4 MSB-first multiplication unit; signal processing algorithms; signed digital arithmetic; square-root operations; Adaptive filters; Added delay; Circuits; Costs; Equations; Fixed-point arithmetic; Hardware; Instruction sets; Lattices; Reflection;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1991. ICASSP-91., 1991 International Conference on

Conference_Location

Toronto, Ont.

ISSN

1520-6149

Print_ISBN

0-7803-0003-3

Type

conf

DOI

10.1109/ICASSP.1991.150545

Filename

150545