Title :
Practical experiences with the SPARXIL co-processor
Author :
Koch, Andreas ; Golze, Ulrich
Author_Institution :
Dept. for VLSI Design, Tech. Univ. Braunschweig, Germany
Abstract :
This paper examines the use of compact FPGA-based configurable processors as an alternative to ever-higher powered general purpose CPUs. It describes sample applications in which even a very simple configurable processor outperforms all but very fast general purpose CPUs. Performance data is given for DES encryption, labeling objects in black-and-white images, and LZW decompression. In particular, the design of the labeling co-processor is presented.
Keywords :
code standards; cryptography; data compression; digital signal processing chips; field programmable gate arrays; image processing; parallel architectures; pipeline processing; reconfigurable architectures; telecommunication standards; DES encryption; LZW decompression; PGA-based configurable processors; SPARXIL co-processor; black-and-white images; general purpose CPU; labeling co-processor design; object labeling; parallel architecture; performance data; pipelining; Algorithm design and analysis; Circuits; Communication system control; Computer architecture; Coprocessors; DNA computing; Field programmable gate arrays; Labeling; Programmable logic arrays; Very large scale integration;
Conference_Titel :
Signals, Systems & Computers, 1997. Conference Record of the Thirty-First Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
Print_ISBN :
0-8186-8316-3
DOI :
10.1109/ACSSC.1997.680267
