Title :
Design and utilization of an FPGA cluster to implement a Digital Wireless Channel Emulator
Author :
Buscemi, Scott ; Sass, Ron
Author_Institution :
Adv. Commun. Technol. Lab., SPAWAR Syst. Center Atlantic, Charleston, SC, USA
Abstract :
A Digital Wireless Channel Emulator (DWCE) is a system that is capable of emulating the RF environment for a group of radios. A major issue with current designs is that they do not scale to a large enough number of nodes to emulate meaningful network due to the amount of computations required for such a system. This paper proposes a novel DWCE design based on a cluster of FPGA devices. By decentralizing the signal processing it is possible to increase the available computational resources to the point where they are no longer the limiting factor to scalability. It demonstrates feasibility by analyzing the computational and network requirements of the application and showing how the proposed design meets those needs. The paper also describes the physical design of a new 64 node FPGA cluster that is being manufactured. An implementation on prototype nodes of this cluster demonstrates the machine will support a high fidelity emulation for 32 radios or a lower-fidelity emulation for 128 radios.
Keywords :
field programmable gate arrays; pattern clustering; signal processing; telecommunication network reliability; wireless channels; DWCE; FPGA cluster utilization; RF environment; computational resource; digital wireless channel emulator; high fidelity emulation; lower-fidelity emulation; signal processing; Emulation; Equations; Field programmable gate arrays; Graphics processing unit; Mathematical model; Radio frequency; Wireless communication;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2012 22nd International Conference on
Conference_Location :
Oslo
Print_ISBN :
978-1-4673-2257-7
Electronic_ISBN :
978-1-4673-2255-3
DOI :
10.1109/FPL.2012.6339253